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志芯源電子科技

Staff Analog IC Design/Snr Manager/Deputy Director

收藏職位
  • 我要分享
  • 50萬-100萬/年
  • 北京
  • |
  • 5年以上
  • |
  • 碩士
  • |
  • 全職

職位誘惑: 成長空間大,五險一金,老板nice,技術領先,股票期權

發布時間: 2021-01-04發布

職位描述

Staff Analog IC Design/Snr Manager/Deputy Director:
Job Description:
In this role, the key responsibilities are the following:
-Involved in specifications of analog portions of IC
-Behavioral modeling to validate architectures
-Transistor-level feasibility studies for various blocks in ADC/DAC/CODECs
-Crafting blocks and documenting design towards formal design reviews
-Drive mask design to implement layout view of designs
-Top-level simulations to validate top-level integration
-Schematic entry, HSPICE simulation, Monte Carlo simulation, layout DRC/LVS, parasitic extraction and post-layout simulation
-Defining production/bench-level test-plans
-Taking lab measurements to validate analog designs
-Driving/reviewing yield/lab test results to drive bug fixes
-Design for ESD compliance
 
Candidate Requirements:
-Masters Degree with 5+ years in related area of expertise or PhD with 2 years of experience
-Deep knowledge of ADC/DAC/CODEC architectures and knowing which are suitable for given applications
-Deep knowledge of band-gaps, bias, op-amps, switched-cap circuits, LDOs, feedback and compensation techniques
Proven expertise in the following areas:
-Significant knowledge of low noise design techniques
-Significant knowledge of high precision techniques in presence of device mismatch Experience in C / Matlab / Verilog modeling
-Strong device physics knowledge as it applies to analog IC designs
-In-depth knowledge in HSPICE, HSIM, AFS, XA Virtuoso, Composer and layout tools as well
-Proven working experience in using spectrum analyzers, oscilloscopes, signal generators, etc. to validate analog designs
-Extensive experience working with production test engineers to firm up test plans and design for testability details

職位發布者

志芯源電子科技有限公司

HR

7天

簡歷處理用時

99%

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